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Embedded Systems and Sensor Networks Research Laboratory

Research            

The Embedded Systems and Sensor Networks Research Laboratory (ESSRL) is part of the School of Engineering and Physics (SEP) of the University of the South Pacific (USP). The research group was established in 2012 and the ESSRL is located at Laucala Campus, Suva, Fiji. The ESSRL focuses on the definition of system-level design and optimization methodologies for embedded systems, and sensor networks architectures and applications. The main research lines within the ESSRL activities include, but are not restricted to, the following topics:

-          Development of optimization techniques for fault detection in reconfigurable embedded system design and on-chip interconnects.

-          Hardware-Software co-design and optimization of System-on-Chip platforms.

-          Development of optimized energy management approaches for wireless system network architectures.

-          Development of low-level fault modeling for mixed-circuit system design.

-          Exploration of sensor technologies in modern transport systems.

-          Development of embedded systems for medical devices and automation.


Scope            

The main objectives of the ESSRL are to establish research partnerships with other international academic research institutions and to link with other leading researchers, engineers and representatives from academic institutions, manufacturers, industry specialists, and government.

ESSRL serves as new fundamental initiative to lead to USP novel research using Soft/Hard-Computing and Communication Engineering Tools and Techniques and Scholarly Teaching in new courses for   graduate students. This will also provide an opportunity to conduct research that will be very useful to the long term in the key areas of Embedded Systems, and Sensor Network Technologies.

ESSRL provides both training and consulting and play innovative marketable value added research and development. In addition, ESSRL helps university graduate students to carry out their thesis research under the co-supervision of leading researchers and faculty members. It also helps the graduate students to update their knowledge of the global state of the art technologies and research advances in embedded systems and sensor networks technologies, which would further help our Research Group tackle new challenges and potential R & D development and compete in sponsored Research Funding.

Current/Former Members            

Faculty

Dr. Assaf H. Mansour
Director

Education:

·  Ph.D. in Electrical Engineering - University of Ottawa, Ottawa, ON, Canada (2003)

·  M.A.Sc. in Electrical and Computer Engineering - University of Ottawa, Ottawa, ON, Canada (1996)

·  B.A.Sc. in Telecommunications Engineering - University of Ottawa, Ottawa, ON, Canada (1994)

Email: assaf_m@usp.ac.fj
Web:
sep.fste.usp.ac.fj
Phone: 679-323-2593

Faculty

Dr. Utkal Mehta

Co-Director


Education:

·  Ph.D. in Electrical and Electronic Engineering - Indian Institute of Technology (IIT), Guwahati, India (2011)

·  M.Engg. in Electrical and Electronic Engineering - University Baroda, India (2003)

·  B.Engg. in Electrical and Electronic Engineering - Gujarat University, India (1999)

Email: mehta_u@usp.ac.fj
Web:
sep.fste.usp.ac.fj
Phone: 679-323-2337

Current Ph.D. Student

Mr. Sheikh Izzal Azid



Education:

·  M.Sc. in Electrical and Electronic Engineering – The University of the South Pacific (2010)

·  BETech. in Electrical and Electronic Engineering - The University of the South Pacific (2007)

Email: azid_s@usp.ac.fj
Web:
sep.fste.usp.ac.fj
Phone: 679-323-2859

Current M.Sc. Student

Mr. Amit Kumar

Education:

·  BETech. in Electrical and Electronic Engineering - The University of the South Pacific (2009)

Email: amit.a.kumar@usp.ac.fj
Web:
sep.fste.usp.ac.fj
Phone: 679-323-2839

Current M.Sc. Student

Ms. Janki Patel

Education:

·  BE. in Electrical Engineering - India (2012)

Email: S11118368@student.usp.ac.fj
Web:
sep.fste.usp.ac.fj
Phone: 679-835-8613

 

Current M.Sc. Student

Mr. Ashwin Chand

Education:

·         PGDENG Postgrad Dip in Engineering - The University of the South Pacific (2013)

BENGTE

·         BETech.  in Electrical and Electronic Engineering - The University of the South Pacific (2004)

Email: S96007823@student.usp.ac.fj
Web:
sep.fste.usp.ac.fj
Phone: 679-872-3290

Former M.Sc. Student

Mr. Sunil Narayan

Education:

·  M.Sc. in Electrical and Electronic Engineering ·  The University of the South Pacific (2014)

·  BETech. in Electrical and Electronic Engineering - The University of the South Pacific (2002)

Email: sunilpraneelnarayan2000@yahoo.com
Web:
sep.fste.usp.ac.fj
Phone: 679-341-0248

 

Current M.Sc. Student

Mr. Arishnil Bali

Education:

·         BE in Electrical and Electronic Engineering - The University of the South Pacific (20014)

Email: s11068975@student.usp.ac.fj
Web:
sep.fste.usp.ac.fj


 

Collaborator

Dr. Biswas Satyen

Professor

Ahsanullah University of Science & Technology

Tejgaon Industrial Area, Dhaka-1208, Bangladesh

Email: sbaiswas@linuxmail.org
Web: www.aust.edu/eee/directory_eee.htm
Phone: 8870422 ext. 320

Collaborator

Dr. Sunil Das

Professor

Troy University

Montgomery, Alabama 36104, USA

Email: sdas@troy.edu

Web: trojan.troy.edu/artsandsciences/faculty/das-sunil.html

Phone: 334-832-7281

Collaborator

Dr. Rami Abielmona

Vice President of Research & Engineering

Larus Technologies Corp.

Unit 1,58 Antares Drive

Ottawa, ON, K2E 7W6

CANADA

Email: rami.abielmona@larus.com

Web: www.larus.com/about-us/leadership-team/

Phone: 613-244-8916

Collaborator

Dr. Miodrag Bolic

Associate Professor

School of Information Technology and Engineering (SITE)

University of Ottawa

161 Louis Pasteur,

Ottawa, ON, K1N 6N5

CANADA

Email: mbolic@site.uottawa.ca

Web: www.site.uottawa.ca/~mbolic/

Phone: 613- 562-5800 ext. 6224

 

Collaborator

Dr. Voicu Groza

Professor

School of Information Technology and Engineering (SITE)

University of Ottawa

800 King Edward Avenue

Ottawa, ON, K1N 6N5

CANADA

Email: groza@site.uottawa.ca

Web: www.site.uottawa.ca/~groza/

Phone: 613-562-5800 ext. 2159

 

Publications

Journal Articles/Conference Proceedings/Technical Reports/Thesis/Dissertations

 

 2016

Conference Proceedings

E. Bokolonga, M. Hauhana, N. Rollings, D. Aitchison, M. H. Assaf, S. R. Das, S. Biswas, E. M. Petiu, and V. Groza, “A Compact Multispectral Image Capture Unit for deployment on Drones”, Proc. I²MTC 2016 – IEEE Int. Instrum. Meas. Technol. Conf., Taipei, Taiwan, 23-26 May 2016 (accepted).

S R. Das, A. Amin, S. Biswas, M. H. Assaf, E. M. Petriu, and V. Groza, “An Algorithm for Generating Prime Implicants”, Proc. I²MTC 2016 – IEEE Int. Instrum. Meas. Technol. Conf., Taipei, Taiwan, 23-26 May 2016 (accepted).

 

2015

Journal Articles

S. P. Narayan, M. H. Assaf, and S. K. Prasad, "Wireless Sensor Enabled Public Transportation System", International Journal of Communications, Network and System Sciences (IJCNS), Vol. 8, No. 5, pp. 187-196, May 2015.

U. Mehta, and Gancho. V, “The constraint optimization approach for robust PID design in AVR system”, Engineering Intelligent Systems, 23 (1), pp. 1-6, 2015

 

Conference Proceedings

 

Chand, A., Prasad, R., Mehta, U. and Assaf, M.: A computer controlled positioning system for a turntable. 7th International conference, EECCS’15, Banglore, 9-10 Jan 2015.

A. Kumar, M.H. Assaf, S.R. Das, S.N. Biswas, E.M. Petriu, and V.Z. Groza, “Image Processing Based System for the Classification of Vehicles for Parking Purposes”, Proc. I²MTC 2015 – IEEE Int. Instrum. Meas. Technol. Conf., Pisa, Italy, 11-14 May 2015.

N. Malan, S.R. Das, S.N. Biswas, M.H. Assaf, S. Morton, E.M. Petriu, and V.Z. Groza,  “Designing Elementary-Tree Space Compressors using AND/NAND and XOR/XNOR Combinations”, Proc. I²MTC 2015 – IEEE Int. Instrum. Meas. Technol. Conf., Pisa, Italy, 11-14 May 2015.

R. Singh, U. Gounder, U. Mehta, K.A. Mamun and M.H. Assaf, "A simplified approach to bare machine application using LabVIEW", IEEE Asia-Pacific World Congress on Engineering APWCE 2015, Plantation Island, Fiji May 4-6 2015.

A. Chand, R. Prasad, U. Mehta, and M. H. Assaf, “A Computer Controlled Positioning System for a Turntable,” Proceedings of 7th International Conference on Electrical, Electronics, Computing and Communication Systems (EECCS'15), Bangalore, pp. 5-8, 9-10 January 2015.

 

2014

Journal Articles

M.H. Assaf, R. Mootoo, S.R. Das, E.M. Petri, V. Groza, and S.N. Biswas, “Designing Home Security and Monitoring System Based on Field Programmable Gate Array,” IETE Technical Review, Vol. 31, No. 2, pp. 168-176, June 2014.

A. Lal, R. Kumar and U. Mehta, “Energy dispatch fuzzy model in hybrid power system” International Energy Journal, 14 (3), pp. 133-142, 2014

M.H. Assaf, L-A. Moore and S.R. Das, S.N. Biswas, and S. Morton, “Low - level logic fault testing ASIC simulation environment,” World Journal of Engineering, Vol. 2, No. 3, pp. 279-286, 2014.

Conference Proceedings

S. Ramagundam, S.R. Das, and S. Morton, S.N. Biswas, V.Z. Groza, M.H. Assaf, and E.M. Petriu, “Design and implementation of high - performance master/slave memory controller with microcontroller bus architecture”, Proc. I²MTC 2014 – IEEE Int. Instrum. Meas. Technol. Conf., Montevideo, pp. 10-15, 12-15 May 2014.

S. R. Das, N. Malan, S. Morton, S. N. Biswas, and M. H. Assaf, “Elementary- Tree Compression Using Combination of Nonlinear and linear Logic,” 22nd Annual International Conference on Composites or Nano Engineering, Malta, July 13-19, 2014.

 

2013

Journal Articles

S.R. Das, J.‑F. LI, A.R. Nayak, M.H. Assaf, E.M. Petriu, and S.N. Biswas,  “Circuit Architecture Test Verification Based on Hardware Software Co-design with ModelSim,” IETE J. Research, Vol. 59, No. 2, pp. 132-140, March-April  2013.

S.R. Das, S. Biswas, E.M. Petriu, V.Groza, M.H. Assaf, and A.R. Nayak, “Fault-tolerance in VLSI systems design using data compression under constraints of failure probabilities–overview and current status,” World Journal of Engineering, Multi-Science Publishing Co, Vol. 10, No. 1, pp. 73-84, March 2013.

M.H. Assaf, S. Khan, S.R. Das, and S. Biswas, “Energy Efficient Optimization of Wireless Embedded Sensor Networks,” Engineering and NanoEngineering, Multi Science Publishing Co, Vol. 10, No. 3, pp. 273-282, June 2013.

Conference Proceedings

S. R. Das, D. Shaw, S. N. Biswas, M. H. Assaf, S. Morton, I. Ozkarahan, E. Petriu, and V. Groza, “Data Compression Using Mixed Cascade of Nonlinear Logic”, Proc. I²MTC 2013 – IEEE Int. Instrum. Meas. Technol. Conf., Minneapolis, MN, May 2013.

Thesis/Dissertation

Narayan, S. P. (2013). Wireless sensor enabled public transport system (Master’s thesis). The University of the South Pacific, Laucala Campus, Suva, Fiji.

 

2012

Journal Articles

S. R. Das, S. N. Biswas, V. Groza, and M. H. Assaf, “Aliasing- free Space Compaction in VLSI with Cascade of Two-Input OR/NOR Logic”, IJRRCS – International Journal of Research and Reviews in Computer Science, Vol. 3 No. 1, February 2012.

S. R. Das, L. Jin, M. H. Assaf,  S. N. Biswas, and E. M. Petriu, ,  "Implementing built-in self-test environment for cores-based digital circuits with Verilog HDL", WORLD JOURNAL OF ENGINEERING, Vol. 9 No. 6, MULTI-SCIENCE PUBLISHING COMPANY LTD. 2012.

S. R. Das, S. N. Biswas, D. Biswas, E. M. Petriu, and M. H. Assaf, “System-on-chips Design Using ISCAS Benchmark Circuits - An Approach to Fault Injection and Simulation Based on Verilog HDL”, IETE Journal of Research, Vol. 58 No. 2, 2012.

Conference Proceedings

M. H. Assaf, R. Mootoo, S. R. Das, E. M. Petriu, V. Z. Groza, and S. Biswas, “Sensor Based Home Automation and Security System,” Proc. I²MTC 2012 – IEEE Int. Instrum. Meas. Technol. Conf., pp. 722-727, Graz, Austria, May 2012.

S. Majhi, V. Kotwal, and U. Mehta, “FPAA-Based PI controller for DC servo position control system,” IFAC Conference on Advances in PID Control, Brescia, Italy, 2012.

M. Assaf, M. Williams, S. Das, and S. Biswas, “SOFTWARE PROFILING OF THE SESSION INITIATION PROTOCOL”, Society for Design & Process Science Conference (SDPS-12), Berlin, Germany, June 2012.

S. R. Das, S. Biswas, M. H. Assaf, V. Z. Groza, and E. M. Petriu, “Two input  linear cascade in space compression,” Proc. I²MTC 2012 – IEEE Int. Instrum. Meas. Technol. Conf., pp. 1808-1813, Graz, Austria, May 2012.

 

 

 

 

 

Active Research Projects:

  • Reconfigurable Embedded Systems Design, Implementation, and Verification

Description: Designing embedded electronics (system-on-chip and embedded systems) is becoming increasingly difficult due to their high complexity, high integration density, and increasing design requirements. Processing requirements of the majority of applications are growing and cannot be solved by single embedded processors, but by extending the systems with customized reconfigurable hardware (HW) or designing multiprocessing systems. Existent system-on-chip (SoC) design flows require highly qualified specialists, with proficiency in both hardware and software, to collect system requirements and to make structural decisions. Given the significant number of design choices, the only possible options to address these problems are automatic exploration of the design space and intelligent acquisition of design requirements.

The main objective of this complex far-reaching project is to develop a methodology and tools to automate the SoC design based on reconfigurable single and multi-processors. Our final goals of the project, whose essential modules will be developed here, are to develop a framework that will automatically generate a multiprocessor system with custom instructions implemented using reconfigurable hardware that satisfies user requirements. We will focus on issues related to real-time applications where a set of timing and area constraints is imposed on the implementation. Furthermore we aim to completely abstract the complexities of this compilation process from the user, and, instead, to collect requirements through an intelligent user interface in an integrated development environment. Our approach is to formulate the design task as a series of optimization problems and to develop efficient methods to solve them. We will also concentrate on design steps at the system level, such as design space exploration, automated generation of custom instructions, architecture selection, performance estimation, and selection between configurable or reconfigurable architectures. As a part of this project, research on multiprocessor systems with configurable and reconfigurable capabilities will be pursued. Numerous local and international companies will be interested in the increased productivity associated with our system.

 

  • Lyapunov Based Control of Unmanned Aerial Vehicles to find path in 3D space and Obstacle Avoidance

Description: This research work is under Modern Control Engineering and Sensor Technology Engineering for complex Engineering problems. First of all stability theory plays a significant role in engineering systems.  Lyapunov Stability will be used to achieve stabilization of unmanned aerial vehicles. Moreover to obtain project objective design Lyapunov algorithm will be used to find shortest path of UAV’s and avoid all moving and/or stationary obstacles. The design is planned to be first achieved on Matlab simulation. Here the design will be done without the external disturbances in the flight of the UAV. Once the trajectory of the UAV is achieved and when the trajectory is stable then the design will be integrated to real UAV for testing purposes. Here in the real environment the trajectory in external disturbances will be studied on. The UAV will also avoid obstacles in a 3D environment. To detect the obstacles image processing sensors are needed. Image processing is a form of signal processing. The method will convert the image from the sensor and convert it into digital form for the system to perform operation on it. For this case image processing will be used to detect the type of obstacle, is it stationary or moving? If the obstacle is moving then at what speed? This data will be feed to the Lyapunov Algorithm in real time for path plan and the stabilization of UAV.  For the proper testing of the real UAV’s a controlled Lab is needed hence the team would like to request to use the ICT test bed.

  • Real Time Hand Gesture Recognition System

Description: Hand gestures are mode of communication without the use of hand actions. Hand gesture recognition (HGR) belongs to the pattern recognition and computer vision fields. It can be implemented in order to communicate using sign languages and can be adopted for communicating with special people especially deaf and dumb. This system can be implemented in controlling devices with the use of hand by simply linking a hand gesture to the state of an electronic device. Other minor application involves Indian classical dance form using madras (hand gestures) and biometric password systems, yogic healing using pressure points in hands. The importance served by this research is that it will help in ease of communication with hearing-impaired people and machines. It can also be utilized in commanding a robot to do specified action hence aiding in robot technology. The recognition system can further be implemented on mobile phones. This research involves processing of video images of hand gestures to classify it as a predefined sign language. As basic approach to recognizing hand gesture, minimum of three gestures will be used which will then be expanded to more gesture recognition. Using a high definition camera with better resolution and frame rate will help in achieving the results accurately and speedily in real time. This research can be broadened to other hand gestures apart from sign languages and also its accuracy could be improved by working on the available materials.

 

·         i-Cane: Mobility aid for blind and visually impaired persons

Description: Visually impaired persons struggle with daily routines and alternative methods are then usually needed to engage with society or in an activity where normal vision is a requisite. They may usually face difficulties in navigating alone safely and avoiding any obstacles, encounter in their day to day activities such as traversing through the streets, managing relatively irregular terrain and even walking around inside of their homes. A solution is sought using ICT enabled device.  Present ‘walking stick’ for blind may need some getting used to and would not be as suitable in challenging situations while higher end solutions are too expensive for an average earner. In this project goal, we want to design a simple, low cost, adoptable, and easy to handle intelligent electronic aid for blind people that tries to make them self-dependent to do their daily tasks. This device will be incorporated and designed such that it can able to help the user navigate independently through signals such as vibrations and audio warnings and also help the user avoid obstacles and changes in environment including depth and rise.

  • Broadcast Based Peer-to-Peer Collaborative Environment for Mobile Robots

Mobile robotics is a field that represents a surprising set of challenges to communications.

One of the ideas that can deeply result in different solutions in mobile robots is that of collaborative and cooperative communications. In many real-life applications, a single robot may be needed to accomplish a certain task. However, a large number of them require the cooperation and collaboration of a team of robots to complete the mission.

This project is a fully distributed, scalable and cost effective environment for mobile robot application. Our platform applies broadcasting communication protocol between the base station and the mobile agents as well as peer-to-peer communication agents to accomplish tasks in a timely manner. Our mobile agents will operate autonomously to complete the given tasks using a pre-determined environment and wireless and sensor technology.

We will demonstrate our collaborative approach by applying it in a design of control architecture of the multiple mobile robots in a pre-determined environment. Our protocol, termed Collaborative Environment for Mobile Robots, makes use of the broadcasting and data sharing to achieve high performance. The implication of using wireless communications for emerging peer-to-peer collaborative environment from a central station will be essential for this project.

 

  • Network Virtualization Based Framework For Smart Grid Communication

A smart Grid is a modernized electric grid that uses analogue or digital information and communication technology to gather and act on information. So, it monitors, protects and automatically optimizes the operation of its interconnected elements. Smart Grid provides a more reliable and efficient power supply. Information exchange is critical in smart grid. Though an optical fibre can provide high capacity and reliability for communication, it is uneconomical and inelastic to provide the connectivity between distributor and consumer. Therefore, other kind of networks i.e. Wireless Mesh Network (WMN) and Power Line Communication (PLC) are required to serve distribution grid.

 

WMN is a promising wireless technology, because of its convenience in deployment and its expanded coverage through wireless multi-hop connections. PLC is suitable because it does not need any extra infrastructure. As both wireless and PLC links are lossy links, it causes bit error and packet loss due to interference and attenuation. So, we have to use the technology which supports customized end-to-end performance of various services. Network Virtualization (NV) is the most suitable technology.

NV allows WMN and PLC to operate as independent and isolated Virtual Network (VN) on shared Substrate Network (SN). In this project we are trying to design an NV-based framework for smart grid communication to meet the requirements of diverse services. In this framework, real-time services are supported by VNs, which are mapped to both WMN and PLC networks simultaneously. The WMN for NV is designed to adopt Orthogonal Frequency Division Multiple Access (OFDMA) scheme, so that different VNs will be allocated distinct subcarriers to separate them easily.

Since VN mapping and subcarrier assignment is Nondeterministic polynomial time (NP) hard, an experiment based solution is developed to solve the problems efficiently and effectively.

In this project a Network virtualization [NV] based framework is proposed for smart grid communication. Some project such as: Virtualization of 802.11 Interfaces for Wireless Mesh Networks [WMNs] were  conducted by researchers based abroad. This project showed the use of virtual wireless interfaces to connect to multiple networks simultaneously and provides capability to build large and small energy efficient WMNs.

In this framework, real-time services are supported by virtual networks [VNs] that are mapped to two physical networks simultaneously i.e. WMN and power line communication [PLC] network. In this way different VNs are allocated distinct subcarriers. The WMN for NV is designed to adopt orthogonal frequency division multiple access as multiple access scheme. The enhanced transmission diversity through the two networks and the allocated subcarriers contributes to the reliability guarantee of the real-time services. Since the VN mapping and subcarrier assignment problem is nondeterministic polynomial-time hard, an experience-based solution has to be developed to solve the problem efficiently and effectively. Simulation result will reveal the effectiveness of our proposed framework.

 

Completed Research Projects:

  • Reconfigurable Industrial controllers on high speed processor

Description: A simple controller like PID-type is always demanded in Industry to satisfy the desired output of the plant. However, it has been reported that there are still a lot of poorly tuned controllers in industry that is because of lack of knowledge and time among the operators. It is also desired to have a controller tuning method to be fast, simple and robust. If not, there is little chance it will be used by industry. In this way, automatic tuning of a PID controller is a key attention for process industries in recent years. Industry wants to achieve a high productivity in a competitive market, reduce cost of product and maintenance. A basic feature of auto-tuners is some experimental procedure by which plant information is obtained in order to compute the controller parameters as most of the cases the actual dynamics of the plant are not known. There are several techniques in Industries established a feature of automatic tuning to improve the performance of the existing controller. Areas like, aerospace, process control, manufacturing, robotics, automation, and transportation systems are equipped with auto-tuner type of PIDs. 

We propose a new online tuning scheme which ensures a tight closed-loop control for the plant without disturbing regular production / output. The focusing part in this study is that the controller can be re tuned without removing it from the main loop. This will help in many critical applications of industry where it is always essentials to get the controller action.  The reconfigurable controller will be designed on high speed processor, which can be configured online through a computing algorithm. Practically all PID controllers made today are based on processors technology. This has given opportunities to provide additional features like automatic tuning, gain scheduling, and continuous adaptation. Advanced transistor based technology so called VLSI, it is possible to design and fabricate the low cost microprocessor with high efficiency and low price. And therefore it becomes most essential component in many control systems. In this project, an industrial controller is to design and then later to implement on recent advanced Reduced Instruction set computer Machine (ARM) processor. Main reasons to use ARM in our auto-tuner are for performance, power efficiency and ease of use. Reconfigurable auto tuner will tune the controller effectively based on the present plant conditions and external disturbances. The method will be simple, robust and easy to adopt by the Industries. The performance is to be measured by developing any one of the industrial application in the laboratory setup.

  • Wireless Sensor Enabled Public Transport System

Description: This project will help the department develop by providing a platform that can be used as a teaching aid in future Radio Frequency Identification course taught at postgraduate level. It will also broaden the department’s research base with a possible research link being established with the other Engineering departments who are already involved in projects. Public Transport is one of the important infrastructures of any country. In developing countries like Fiji a bus transport consists of 90% of public transport. However, lack of systematic mechanism to monitor and manage the bus-network is leading to lack of predictability of the bus network. It gets difficult to identify causes behind delays, or predict the arrival times. Bus transport system faces the ever-increasing problem of traffic and congestion. Without a well-deployed monitoring system, it becomes very difficult to plan for optimization and growth. The operations of bus-transport systems can be significantly improved by monitoring the bus operations and analyzing them to providing useful information both to the travelers and bus operating authorities. Below are list some examples:

- Travelers can benefit from information such as current bus location, expected time of arrival of a bus at a bus stop, availability of seating space in the buses, etc.

- Collected information can be used to infer likely causes behind the observed bus delays, the bottleneck traffic junctions, heavy traffic time slots, and make appropriate scheduling recommendations.

- Information about characteristics of the road traffic patterns, route delays, traffic growth trends can be of great help in proper planning.

 

The RFID system comprises a reader, its antenna and transponders (tags, RFID cards) that carry data. The reader transmits a low-power radio signal through its antenna, which is received by its own antenna and used to power an integrated circuit (chip). Using energy it gets from the signal when it enters the radio field, the tag will sent to a controlling computer for processing and management. 


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Page last updated: Thursday, July 20, 2017
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Suva, Fiji.
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Email: sep@usp.ac.fj